TESTING & COSMETIC NOTES:
This is a USED WORKING item in GOOD cosmetic condition that IS THOROUGHLY TESTED and is GUARANTEED WORKING
The unit has been reset to the factory default settings. See console log below.
COMPONENTS INCLUDED IN THIS AUCTION:
• (1) – DELL POWERSWITCH N1524P 24-PORT POE+ 4-SFP+ MANAGED GIGABIT NETWORK SWITCH
• (1) – NOTCHED POWER CORD
REPLACEMENT or MONEY BACK GUARANTEE:
When you receive a Guaranteed item from OC Depot, it should perform as described. In the rare situation that this is not the case, we will send a replacement upon safe return of the original item within 30 days of receiving the item. If a replacement is not available we will honor the terms of our Money-Back Guarantee.
ADDITIONAL INFORMATION:
U-Boot 2012.10-00167-g9172591 (Mar 02 2015 – 10:39:33)
I2C: ready
BENCH SCREENING TEST1
=========================================
IPROC_XGPLL_CTRL_3: 0x05400000
IPROC_XGPLL_STATUS: 0x80000579
DCO code: 87
=========================================
DEV ID = 0xdb56
SKU ID = 0xb150
DDR type: DDR3
MEMC 0 DDR speed = 667MHz
PHY revision version: 0x00024006
ddr_init2: Calling soc_ddr40_set_shmoo_dram_config
ddr_init2: Calling soc_ddr40_phy_calibrate
C01. Check Power Up Reset_Bar
C02. Config and Release PLL from reset
C03. Poll PLL Lock
C04. Calibrate ZQ (ddr40_phy_calib_zq)
C05. DDR PHY VTT On (Virtual VTT setup) DISABLE all Virtual VTT
C06. DDR40_PHY_DDR3_MISC
C07. VDL Calibration
C07.1
C07.2
C07.4
C07.4.1
C07.4.4
VDL calibration result: 0x30000003 (cal_steps = 0)
C07.4.5
C07.4.6
C07.5
C08. DDR40_PHY_DDR3_MISC : Start DDR40_PHY_RDLY_ODT….
C09. Start ddr40_phy_autoidle_on (MEM_SYS_PARAM_PHY_AUTO_IDLE) ….
C10. Wait for Phy ReadyDone.
DDR phy calibration passed
Programming controller register
ddr_init2: MemC initialization complete
Validate Shmoo parameters stored in flash ….. OK
Press Ctrl-C to run Shmoo ….. skipped
Restoring Shmoo parameters from flash ….. done
Running simple memory test ….. OK
DeepSleep wakeup: ddr init bypassed 3
DDR Interface Ready
CPLD: addr=0x21, rev=10
Board: L2 24 Port Copper POE+ Switch, Unkonwn
DRAM: 1 GiB
NAND: Micron MT29F1G08ABADA, 128 KiB blocks, 2 KiB pages, 16B OOB, 8-bit
NAND: chipsize 128 MiB
In: serial
Out: serial
Err: serial
arm_clk=1000MHz, axi_clk=400MHz, apb_clk=100MHz, arm_periph_clk=500MHz
Unlocking L2 Cache …Done
l2cc_invalidate – Done, i = 977, invway = 0
Net: Registering eth
Broadcom BCM IPROC Ethernet driver 0.1
Using GMAC0 (0x18022000)
et0: ethHw_chipAttach: Chip ID: 0xdb56; phyaddr: 0x1
ethHw_miiphy_write (addr&f):phyaddr (addr&1f00):bank
ethHw_miiphy_write phyaddr(0x1) bank(0x0) reg(0x0) data(0x2100)
bcmiproc_eth-0
========== relocate address: 0xdff7c000, offset 0xc1f7c000 ==========
boot in 3 s
Creating 1 MTD partitions on “nand0”:
0x000000200000-0x000007000000 : “mtd=4”
UBI: attaching mtd1 to ubi0
UBI: physical eraseblock size: 131072 bytes (128 KiB)
UBI: logical eraseblock size: 126976 bytes
UBI: smallest flash I/O unit: 2048
UBI: VID header offset: 2048 (aligned 2048)
UBI: data offset: 4096
UBI: attached mtd1 to ubi0
UBI: MTD device name: “mtd=4”
UBI: MTD device size: 110 MiB
UBI: number of good PEBs: 880
UBI: number of bad PEBs: 0
UBI: max. allowed volumes: 128
UBI: wear-leveling threshold: 4096
UBI: number of internal volumes: 1
UBI: number of user volumes: 1
UBI: available PEBs: 20
UBI: total number of reserved PEBs: 860
UBI: number of PEBs reserved for bad PEB handling: 8
UBI: max/mean erase counter: 5/2
UBIFS: recovery needed
UBIFS: recovery deferred
UBIFS: mounted UBI device 0, volume 0, name “fs”
UBIFS: mounted read-only
UBIFS: file system size: 106278912 bytes (103788 KiB, 101 MiB, 837 LEBs)
UBIFS: journal size: 9023488 bytes (8812 KiB, 8 MiB, 72 LEBs)
UBIFS: media format: w4/r0 (latest is w4/r0)
UBIFS: default compressor: LZO
UBIFS: reserved for root: 0 bytes (0 KiB)
Loading file ‘/image2’ to addr 0xb0000000 with size 27684345 (0x01a66df9)…
Done
## Booting kernel from Legacy Image at b0000074 …
Image Name: System for iproc_h2b
Image Type: ARM Linux Multi-File Image (gzip compressed)
Data Size: 27684165 Bytes = 26.4 MiB
Load Address: a1008000
Entry Point: a1008000
Contents:
Image 0: 3247528 Bytes = 3.1 MiB
Image 1: 1090976 Bytes = 1 MiB
Image 2: 474 Bytes = 474 Bytes
Image 3: 23345165 Bytes = 22.3 MiB
Verifying Checksum … OK
## Loading init Ramdisk from multi component Legacy Image at b0000074 …
Uncompressing Multi-File Image … OK
boot_prep_linux commandline: console=ttyS0,9600n8 maxcpus=1 mem=1008M root=/dev/
ram mtdparts=spi1.0:1024k(u-boot);nand_iproc.0:1024k(nboot),512k(nenv),256k(vpd)
,256k(shmoo),112640k(fs),16384k(diags) ubi.mtd=fs ethaddr=14:18:77:7a:b1:55 quie
t
Starting kernel …
starting pid 1074, tty ”: ‘/etc/init.d/rcS’
starting pid 1206, tty ‘/dev/ttyS0’: ‘/etc/rc.d/rc.fastpath’
Mounting /dev/mtdblock4 at /mnt/fastpath…done.
Mounting tmpfs at /mnt/application…done.
Dell Networking Boot Options
============================
Select a menu option within 3 seconds or the Operational Code will start automat
ically…
1 – Start Operational Code
2 – Display Boot Menu
Select (1, 2)#
Extracting Operational Code from .stk file…done.
Loading Operational Code…done.
Decompressing Operational Code…done.
Uncompressing apps.lzma
Uncompressing python.lzma
Installing Python
DMA pool size: 16777216
AXI unit 0: Dev 0xb150, Rev 0x01, Chip BCM56150_A0, Driver BCM56150_A0
SOC unit 0 attached to PCI device BCM56150_A0
hpc – No stack ports. Starting in stand-alone mode.
Feb 27 00:57:21 0.0.0.0-1 General[fp_main_task]: bootos.c(191) 7 %% CRIT E
vent(0xaaaaaaaa)
started!
Feb 27 00:57:21 0.0.0.0-1 SIM[Cnfgr_Thread ]: sim_util.c(3910) 9 %% ALRT S
witch was reset due to power disruption or unexpected restart.(error[0x0]).
(Unit 1 – Waiting to select management unit)>
Applying Global configuration, please wait …
Applying Interface configuration, please wait …
console>















